AiP74HC/HCT137

3-to-8 Line Decoder/Demultiplexer with Address latches; Inverting

The AiP74HC/HCT137 are 3-to-8 line decoder/demultiplexers with latches at the three address inputs (An). The AiP74HC/HCT137 essentially combines the 3-to-8 decoder function with a 3-bit storage latch. When the latch is enabled (LE—=LOW), the AiP74HC/HCT137 acts as a 3-to-8 active LOW decoder. When the latch enable (LE—) goes from LOW-to-HIGH, the last data present at the inputs before this transition, is stored in the latches. Further address changes are ignored as long asLE— remains HIGH.

The output enable input (E—1 and E2) controls the state of the outputs independent of the address inputs or latch operation. All outputs are HIGH unlessE—1 is LOW and E2 is HIGH.

The AiP74HC/HCT137 is ideally suited for implementing non-overlapping decoders in 3-state systems and strobed (stored address) applications in bus oriented systems.